触发器

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74ALVT162821

20-bit bus interface D-type flip-flop; positive-edge trigger with 30 Ohm termination resistors; 3-state

应用领域

The 74ALVT162821 is a 20-bit positive-edge triggered D-type flip-flop with 30 Ω termination resistors and 3-state outputs

The device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 10-bits. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the flip-flops. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs

产品详情

特性

  • Wide supply voltage range from 2.3 V to 3.6 V

  • Overvoltage tolerant inputs to 5.5 V

  • BiCMOS high speed and output drive

  • Outputs include series resistance of 30 Ω making external termination resistors unnecessary

  • No bus current loading when output is tied to 5 V bus

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • 20-bit positive-edge triggered register

  • 5 V I/O compatible

  • Multiple VCC and GND pins minimize switching noise

  • Bus hold on data inputs

  • Live insertion and extraction permitted

  • Power-up reset

  • Power-up 3-state

  • Output capability: +12 mA and -12 mA

  • Latch-up protection:

    • JESD17: exceeds 500 mA

  • ESD protection:

    • MIL STD 883, method 3015: exceeds 2000 V

    • MM: exceeds 200 V

  • Specified from -40 °C to 85 °C


参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Package name
74ALVT162821DGGProduction2.3 - 3.6TTL± 123.2150medium-40~859321.0TSSOP56