74AHC1G79-Q100; 74AHCT1G79-Q100

Single D-type flip-flop; positive-edge trigger

应用领域

The 74AHC1G79-Q100; 74AHCT1G79-Q100 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

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产品详情

特性

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Wide supply voltage range from 2.0 to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Symmetrical output impedance
Balanced propagation delays
Input levels:

For 74AHC1G79-Q100: CMOS level
For 74AHCT1G79-Q100: TTL level

ESD protection:

MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)

参数类型

Type number	Product status	VCC (V)	Logic switching levels	Output drive capability (mA)	tpd (ns)	fmax (MHz)	Power dissipation considerations	Tamb (°C)	Rth(j-a) (K/W)	Ψth(j-top) (K/W)	Rth(j-c) (K/W)	Package name
74AHC1G79GV-Q100	Production	2.0 - 5.5	CMOS	± 8	3.5	90	low	-40~125	272	64.5	170	TSOP5
74AHC1G79GW-Q100	Production	2.0 - 5.5	CMOS	± 8	3.5	90	low	-40~125	312	82.5	183	TSSOP5
74AHCT1G79GV-Q100	Production	4.5 - 5.5	TTL	± 8	3.5	90	low	-40~125	272	64.5	170	TSOP5
74AHCT1G79GW-Q100	Production	4.5 - 5.5	TTL	± 8	3.5	90	low	-40~125	312	82.5	183	TSSOP5

触发器/锁存器/寄存器

74AHC1G79-Q100; 74AHCT1G79-Q100

应用领域

特性

参数类型