74LV393-Q100

Dual 4-bit binary ripple counter

应用领域

The 74LV393-Q100 is a dual 4-stage binary ripple counter. Each counter features a clock input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on nMR clears the counter stages and forces the outputs LOW, independent of the state of nCP. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

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产品详情

特性

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical VOLP (output ground bounce) 0.8 V at VCC = 3.3 V, Tamb = 25 °C
Typical VOHV (output VOH undershoot) 2 V at VCC = 3.3 V, Tamb = 25 °C
Two 4-bit binary counters with individual clocks
Divide-by any binary module up to 28 in one package
Two master resets to clear each 4-bit counter individually
Complies with JEDEC standard no. 7A
ESD protection:

MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

参数类型

Type number	Product status	VCC (V)	Output drive capability (mA)	Logic switching levels	tpd (ns)	fmax (MHz)	Power dissipation considerations	Tamb (°C)	Rth(j-a) (K/W)	Ψth(j-top) (K/W) operating thermal characterization parameter measured between the junction and top center of a package of an integrated circuit component	Rth(j-c) (K/W)	Package name
74LV393D-Q100	Production	1.0 - 3.6	± 6	TTL	12	99	low	-40~125	89	7.4	47	SO14
74LV393PW-Q100	Production	1.0 - 3.6	± 6	TTL	12	99	low	-40~125	128	3.4	52.5	TSSOP14

计数器/分频器

74LV393-Q100

应用领域

特性

参数类型