Presettable synchronous 4-bit binary counter; asynchronous reset
The 74LVC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HIGH or LOW. A LOW at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW at the master reset input (MR) sets Q0 to Q3 LOW regardless of the levels at input pins CP, PE, CET and CEP (thus providing an asynchronous clear function). The look-ahead carry simplifies serial cascading of the counters. Both CEP and CET must be HIGH to count. The CET input is fed forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HI
Overvoltage tolerant inputs to 5.5 V
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power dissipation
Direct interface with TTL levels
Asynchronous reset
Synchronous counting and loading
Two count enable inputs for n-bit cascading
Positive edge-triggered clock
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Type number | Product status | VCC (V) | Output drive capability (mA) | Logic switching levels | tpd (ns) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
---|---|---|---|---|---|---|---|---|---|---|---|
74LVC161BQ | Production | 1.2 - 3.6 | ± 24 | CMOS/LVTTL | 4.9 | low | -40~125 | 93 | 13.8 | 62 | DHVQFN16 |
74LVC161D | Production | 1.2 - 3.6 | ± 24 | CMOS/LVTTL | 4.9 | low | -40~125 | 92 | 9.6 | 51.7 | SO16 |
74LVC161PW | Production | 1.2 - 3.6 | ± 24 | CMOS/LVTTL | 4.9 | low | -40~125 | 125 | 4.6 | 54.7 | TSSOP16 |