24-stage frequency divider and oscillator
The HEF4521B consists of a chain of 24 toggle flip-flops with an overriding asynchronous master reset input (MR), and an input circuit that allows three modes of operation. The single inverting stage (A2 to Y2) functions as: a crystal oscillator, an input buffer for an external oscillator or in combination with A1 as an RC oscillator. The crystal oscillator operates in Low-power mode when pins VSS1 and VDD1 are supplied via external resistors.
Each flip-flop divides the frequency of the previous flip-flop by two, consequently the HEF4521B counts up to 224 = 16777216. The counting advances on the HIGH-to-LOW transition of the clock (A2). The outputs from each of the last seven stages (218 to 224) are available for additional flexibility.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.
Wide supply voltage range from 3.0 V to 15.0 V
CMOS low power dissipation
High noise immunity
Low power crystal oscillator operation
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Complies with JEDEC standard JESD 13-B
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to +85 °C
Type number | Product status | VCC (V) | Output drive capability (mA) | Logic switching levels | tpd (ns) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
---|---|---|---|---|---|---|---|---|---|---|---|
HEF4521BT | Production | 4.5 - 15.5 | ± 2.4 | CMOS | 220 | medium | -40~85 | 65 | 1.0 | 22.8 | SO16 |