74HC393; 74HCT393

Dual 4-bit binary ripple counter

应用领域

The 74HC393; 74HCT393 is a dual 4-stage binary ripple counter. Each counter features a clock input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on nMR clears the counter stages and forces the outputs LOW, independent of the state of nCP. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

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产品详情

特性

Wide supply voltage range from 2.0 V to 6.0 V
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards:

JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)

Input levels:

For 74HC393: CMOS level
For 74HCT393: TTL level

ESD protection:

HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V.

Two 4-bit binary counters with individual clocks
Divide by any binary module up to 28 in one package
Two master resets to clear each 4-bit counter individually

参数类型

Type number	Product status	VCC (V)	Output drive capability (mA)	Logic switching levels	tpd (ns)	Power dissipation considerations	Tamb (°C)	Rth(j-a) (K/W)	Ψth(j-top) (K/W)	Rth(j-c) (K/W)	Package name
74HC393BQ	Production	2.0 - 6.0	± 5.2	CMOS	12	low	-40~125	91	8.6	58	DHVQFN14
74HC393D	Production	2.0 - 6.0	± 5.2	CMOS	12	low	-40~125	89	7.4	47	SO14
74HC393PW	Production	2.0 - 6.0	± 5.2	CMOS	12	low	-40~125	128	3.4	52.5	TSSOP14
74HCT393BQ	Production	4.5 - 5.5	± 4	TTL	20	low	-40~125	91	8.6	58	DHVQFN14
74HCT393D	Production	4.5 - 5.5	± 4	TTL	20	low	-40~125	89	7.4	47	SO14
74HCT393PW	Production	4.5 - 5.5	± 4	TTL	20	low	-40~125	128	3.4	52.5	TSSOP14

计数器/分频器

74HC393; 74HCT393

应用领域

特性

参数类型