74AHC139-Q100; 74AHCT139-Q100

Dual 2-to-4 line decoder/demultiplexer

应用领域

The 74AHC139-Q100; 74AHCT139-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A.

The 74AHC139-Q100; 74AHCT139-Q100 is a high-speed, dual 2-to-4 line decoder/demultiplexer. This device has two independent decoders. Each decoder accepts two binary weighted inputs (nA0 and nA1) and provides four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced HIGH. The enable input can be used as the data input for a 1‑to‑4 demultiplexer application.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

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产品详情

特性

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40°C to +85°C and from -40°C to +125°C

Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher than VCC
Input levels:

For 74AHC139-Q100: CMOS level
For 74AHCT139-Q100: TTL level

ESD protection:

MIL-STD-883, method 3015 exceeds 2000V
HBM JESD22-A114F exceeds 2000V
MM JESD22-A115-A exceeds 200V (C = 200pF, R = 0Ω)

Multiple package options

参数类型

Type number	Product status	VCC (V)	Logic switching levels	Output drive capability (mA)	tpd (ns)	Power dissipation considerations	Tamb (°C)	Rth(j-a) (K/W)	Ψth(j-top) (K/W)	Rth(j-c) (K/W)	Package name
74AHC139D-Q100	Production	2.0 - 5.5	CMOS	± 8	3.9	low	-40~125	90	8.6	49	SO16
74AHC139PW-Q100	Production	2.0 - 5.5	CMOS	± 8	3.9	low	-40~125	122	4.0	52	TSSOP16
74AHCT139D-Q100	Production	4.5 - 5.5	TTL	± 8	3.6	low	-40~125	90	8.6	49	SO16
74AHCT139PW-Q100	Production	4.5 - 5.5	TTL	± 8	3.6	low	-40~125	122	4.0	52	TSSOP16

开关/多路复用器/解复用器

74AHC139-Q100; 74AHCT139-Q100

应用领域

特性

参数类型