74HC03-Q100; 74HCT03-Q100

Quad 2-input NAND gate; open-drain output

应用领域

The 74HC03-Q100; 74HCT03-Q100 is a quad 2-input NAND gate with open-drain outputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

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产品详情

特性

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Wide supply voltage range from 2.0 V to 6.0 V
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Input levels:

For 74HC03-Q100: CMOS level
For 74HCT03-Q100: TTL level

Complies with JEDEC standards:

JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)

ESD protection:

MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

参数类型

Type number	Product status	VCC (V)	Logic switching levels	Output drive capability (mA)	tpd (ns)	fmax (MHz)	Nr of bits	Power dissipation considerations	Tamb (°C)	Rth(j-a) (K/W)	Ψth(j-top) (K/W)	Rth(j-c) (K/W)	Package name
74HC03D-Q100	Production	2.0 - 6.0	CMOS	5.2	8	36	4	low	-40~125	96	12.2	54	SO14
74HC03PW-Q100	Production	2.0 - 6.0	CMOS	5.2	8	36	4	low	-40~125	133	5.2	58.6	TSSOP14
74HCT03D-Q100	Production	4.5 - 5.5	TTL	± 4	10	36	4	low	-40~125	98	13.4	56	SO14
74HCT03PW-Q100	Production	4.5 - 5.5	TTL	± 4	10	36	4	low	-40~125	133	5.2	58.6	TSSOP14

门

74HC03-Q100; 74HCT03-Q100

应用领域

特性

参数类型