Quad 2-input NAND gate
The 74HC00-Q100; 74HCT00-Q100 is a quad 2-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 to 6.0 V
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Input levels:
For 74HC00-Q100: CMOS level
For 74HCT00-Q100: TTL level
Complies with JEDEC standards:
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)
Multiple package options
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
74HC00BQ-Q100 | Production | 2.0 - 6.0 | CMOS | ± 5.2 | 7 | 36 | 4 | low | -40~125 | 107 | 21.7 | 75 | DHVQFN14 |
74HC00D-Q100 | Production | 2.0 - 6.0 | CMOS | ± 5.2 | 7 | 36 | 4 | low | -40~125 | 109 | 20.9 | 68 | SO14 |
74HC00PW-Q100 | Production | 2.0 - 6.0 | CMOS | ± 5.2 | 7 | 36 | 4 | low | -40~125 | 142 | 8.1 | 68 | TSSOP14 |
74HCT00BQ-Q100 | Production | 4.5 - 5.5 | TTL | ± 4 | 10 | 36 | 4 | low | -40~125 | 107 | 21.7 | 75 | DHVQFN14 |
74HCT00D-Q100 | Production | 4.5 - 5.5 | TTL | ± 4 | 10 | 36 | 4 | low | -40~125 | 109 | 20.9 | 68 | SO14 |
74HCT00PW-Q100 | Production | 4.5 - 5.5 | TTL | ± 4 | 10 | 36 | 4 | low | -40~125 | 142 | 8.1 | 68 | TSSOP14 |