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Dual 2-input NAND gate
The 74HC2G00-Q100; 74HCT2G00-Q100 is a dual 2-input NAND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40°C to +85°C and from -40°C to +125°C
Wide supply voltage range from 2.0V to 6.0V
Input levels:
For 74HC2G00-Q100: CMOS level
For 74HCT2G00-Q100: TTL level
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
MIL-STD-883, method 3015 exceeds 2000V
HBM JESD22-A114F exceeds 2000V
MM JESD22-A115-A exceeds 200V (C = 200pF, R = 0Ω)
| Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HC2G00DC-Q100 | Production | 2.0 - 6.0 | CMOS | ± 5.2 | 9 | 36 | 2 | low | -40~125 | 204 | 35.1 | 115 | VSSOP8 |
| 74HC2G00DP-Q100 | Production | 2.0 - 6.0 | CMOS | ± 5.2 | 9 | 36 | 2 | low | -40~125 | 216 | 20.5 | 106 | TSSOP8 |
| 74HCT2G00DC-Q100 | Production | 4.5 - 5.5 | TTL | ± 4 | 12 | 36 | 2 | low | -40~125 | 204 | 35.1 | 115 | VSSOP8 |
| 74HCT2G00DP-Q100 | Production | 4.5 - 5.5 | TTL | ± 4 | 12 | 36 | 2 | low | -40~125 | 216 | 20.5 | 106 | TSSOP8 |
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