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Quad 2-input NAND Schmitt trigger
The 74LVC132A-Q100 provides four 2-input NAND gates with Schmitt trigger inputs. It can transform slowly changing input signals into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environment.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 1.2 V to 3.6 V
5 V tolerant inputs for interfacing with 5 V logic
CMOS low-power consumption
Direct interface with TTL levels
Unlimited input rise and fall times
Inputs accept voltages up to 5.5 V
Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
Multiple package options
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
Wave and pulse shapers for highly noisy environments
Astable multivibrator
Monostable multivibrator.
| Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC132ABQ-Q100 | Production | 1.2 - 3.6 | CMOS/LVTTL | ± 24 | 3.4 | 175 | 4 | low | -40~125 | 108 | 22.6 | 76 | DHVQFN14 |
| 74LVC132AD-Q100 | Production | 1.2 - 3.6 | CMOS/LVTTL | ± 24 | 3.4 | 175 | 4 | low | -40~125 | 111 | 21.9 | 69 | SO14 |
| 74LVC132APW-Q100 | Production | 1.2 - 3.6 | CMOS/LVTTL | ± 24 | 3.4 | 175 | 4 | low | -40~125 | 143 | 8.4 | 69 | TSSOP14 |
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