74LVC1G08-Q100

Single 2-input AND gate

应用领域

The 74LVC1G08-Q100 is a single 2-input AND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.

Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

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产品详情

特性

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low power dissipation
Direct interface with TTL levels
Overvoltage tolerant inputs to 5.5 V
IOFF circuitry provides partial Power-down mode operation
Latch-up performance ≤ 250 mA
Complies with JEDEC standard:

JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)

ESD protection:

MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)

参数类型

Type number	Product status	VCC (V)	Logic switching levels	Output drive capability (mA)	tpd (ns)	fmax (MHz)	Nr of bits	Power dissipation considerations	Tamb (°C)	Rth(j-a) (K/W)	Ψth(j-top) (K/W)	Rth(j-c) (K/W)	Package name
74LVC1G08GM-Q100	Production	1.65 - 5.5	CMOS/LVTTL	± 24	2.1	150	1	low	-40~125	313	7.8	158	XSON6
74LVC1G08GV-Q100	Production	1.65 - 5.5	CMOS/LVTTL	± 24	2.1	150	1	low	-40~125	270	63.3	169	TSOP5
74LVC1G08GW-Q100	Production	1.65 - 5.5	CMOS/LVTTL	± 24	2.1	150	1	low	-40~125	311	80.9	181	TSSOP5

门

74LVC1G08-Q100

应用领域

特性

参数类型