![[pics:title]](/static/upload/image/20230301/1677646214552460.png)
2-input EXCLUSIVE-OR gate
The 74LVC1G86-Q100 provides the 2-input EXCLUSIVE-OR function.
Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
Overvoltage tolerant inputs to 5.5 V
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
±24 mA output drive (VCC = 3.0 V)
CMOS low power dissipation
IOFF circuitry provides partial Power-down mode operation
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
| Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC1G86GV-Q100 | Production | 1.65 - 5.5 | CMOS/LVTTL | ± 32 | 2.4 | 150 | 1 | low | -40~125 | 270 | 63.3 | 169 | TSOP5 |
| 74LVC1G86GW-Q100 | Production | 1.65 - 5.5 | CMOS/LVTTL | ± 32 | 2.4 | 150 | 1 | low | -40~125 | 311 | 80.9 | 181 | TSSOP5 |
陈先生：13823795018
咨询热线：0755-29834675
Copyright © 2015-2022 深圳瑞天微科技有限公司版权所有 粤ICP备2022109263号
