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Quad 2-input OR gate
The 74ABT32 is a quad 2-input OR gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Supply voltage range from 4.5 V to 5.5 V
BiCMOS high speed and output drive
Direct interface with TTL levels
IOFF circuitry provides partial Power-down mode operation
Latch-up protection exceeds 500 mA per JESD78B class II level A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to +85 °C
| Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74ABT32D | Production | 4.5 - 5.5 | TTL | -15 / +20 | 2.3 | 100 | 4 | medium | -40~85 | 106 | 18.9 | 64 | SO14 |
| 74ABT32PW | Production | 4.5 - 5.5 | TTL | -15 / +20 | 2.3 | 100 | 4 | medium | -40~85 | 140 | 7.4 | 66 | TSSOP14 |
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