Wide supply voltage range from 2.0 V to 5.5 V
Input levels:
For 74AHC08: CMOS level
For 74AHCT08: TTL level
Balanced propagation delays
All inputs have a Schmitt-trigger action
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
ESD protection:
HBM EIA/JESD22-A114E exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101C exceeds 1000 V
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
| Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AHC08BQ | Production | 2.0 - 5.5 | CMOS | ± 8 | 3.5 | 60 | 4 | low | -40~125 | 103 | 18.4 | 71 | DHVQFN14 |
| 74AHC08D | Production | 2.0 - 5.5 | CMOS | ± 8 | 3.5 | 60 | 4 | low | -40~125 | 105 | 17.8 | 63 | SO14 |
| 74AHC08PW | Production | 2.0 - 5.5 | CMOS | ± 8 | 3.5 | 60 | 4 | low | -40~125 | 138 | 6.9 | 64 | TSSOP14 |
| 74AHCT08BQ | Production | 4.5 - 5.5 | TTL | ± 8 | 5.0 | 60 | 4 | low | -40~125 | 103 | 18.4 | 71 | DHVQFN14 |
| 74AHCT08D | Production | 4.5 - 5.5 | TTL | ± 8 | 5.0 | 60 | 4 | low | -40~125 | 105 | 17.8 | 63 | SO14 |
| 74AHCT08PW | Production | 4.5 - 5.5 | TTL | ± 8 | 5.0 | 60 | 4 | low | -40~125 | 138 | 6.9 | 64 | TSSOP14 |
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