Wide supply voltage range from 2.0 to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Symmetrical output impedance
Balanced propagation delays
Input levels:
For 74AHC1G08: CMOS level
For 74AHCT1G08: TTL level
ESD protection:
HBM JESD22-A114E: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
Specified from -40 °C to +125 °C
Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
74AHC1G08GV | Production | 2.0 - 5.5 | CMOS | ± 8 | 3.2 | 60 | 1 | low | -40~125 | 272 | 64.5 | 170 | TSOP5 |
74AHC1G08GW | Production | 2.0 - 5.5 | CMOS | ± 8 | 3.2 | 60 | 1 | low | -40~125 | 312 | 82.5 | 183 | TSSOP5 |
74AHCT1G08GV | Production | 4.5 - 5.5 | TTL | ± 8 | 3.6 | 60 | 1 | low | -40~125 | 272 | 64.5 | 170 | TSOP5 |
74AHCT1G08GW | Production | 4.5 - 5.5 | TTL | ± 8 | 3.6 | 60 | 1 | low | -40~125 | 312 | 82.5 | 183 | TSSOP5 |