74AUP1T58

Low-power configurable gate with voltage-level translator

应用领域

The 74AUP1T58 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND. Low threshold Schmitt trigger inputs allow these devices to be driven by 1.8 V logic levels in 3.3 V applications.

This device ensures very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

附件下载立即咨询在线申请

产品详情

特性

Wide supply voltage range from 2.3 V to 3.6 V
High noise immunity
Low static power consumption; ICC = 1.5 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Overvoltage tolerant inputs to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
ESD protection:

HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V

Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type number	Product status	VCC (V)	Logic switching levels	Output drive capability (mA)	tpd (ns)	fmax (MHz)	Nr of bits	Power dissipation considerations	Tamb (°C)	Rth(j-a) (K/W)	Ψth(j-top) (K/W)	Rth(j-c) (K/W)	Package name
74AUP1T58GM	Production	2.3 - 3.6	CMOS	± 1.9	8.7	70	1	ultra low	-40~125	290	6.5	145	XSON6
74AUP1T58GN	Production	2.3 - 3.6	CMOS	± 1.9	8.7	70	1	ultra low	-40~125	275	11.7	171	XSON6
74AUP1T58GS	Production	2.3 - 3.6	CMOS	± 1.9	8.7	70	1	ultra low	-40~125	272	14.8	177	XSON6
74AUP1T58GW	Production	2.3 - 3.6	CMOS	± 1.9	8.7	70	1	ultra low	-40~125	264	38.6	153	TSSOP6

门

74AUP1T58

应用领域

特性

参数类型