74AUP1T86

Low-power 2-input EXCLUSIVE-OR gate with voltage-level translator

应用领域

The 74AUP1T86 provides the single 2-input EXCLUSIVE-OR function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V.

The 74AUP1T86 is designed for logic-level translation applications with input switching levels that accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.3 V supply voltage.

The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to 2.3 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire VCC range.

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产品详情

特性

Wide supply voltage range from 2.3 V to 3.6 V
High noise immunity
ESD protection:

HBM JESD22-A114F Class 3A exceeds 5000 V
CDM JESD22-C101E exceeds 1000 V

Low static power consumption; ICC = 1.5 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type number	Product status	Logic switching levels	Output drive capability (mA)	tpd (ns)	Nr of bits	Power dissipation considerations	Tamb (°C)	Rth(j-a) (K/W)	Ψth(j-top) (K/W) operating thermal characterization parameter measured between the junction and top center of a package of an integrated circuit component	Rth(j-c) (K/W)	Package name
74AUP1T86GW	Production	CMOS	± 1.9	8.7	1	ultra low	-40~125	316	86.0	186	TSSOP5
74AUP1T86GX	Production	CMOS	± 1.9	8.7	1	ultra low	-40~125	340	105.0	207	X2SON5

门

74AUP1T86

应用领域

特性

参数类型