16-bit transparent D-type latch; 3-state
The 74ALVT16373 is a 16-bit D-type transparent latch with 3-state outputs. The device can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The device features two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs
Wide supply voltage range from 2.3 to 3.6 V
Overvoltage tolerant inputs to 5.5 V
BiCMOS high speed and output drive
16-bit transparent latch
5 V I/O compatible
3-state buffers
Output capability: +64 mA/–32 mA
Direct interface with TTL levels
Input and output interface capability to systems at 5 V supply
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
No bus current loading when output is tied to 5 V bus
IOFF circuitry provides partial Power-down mode operation
Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
ESD protection:
MIL STD 883 method 3015: exceeds 2000 V
MM exceeds 200 V
Specified from -40 °C to 85 °C
Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
---|---|---|---|---|---|---|---|---|---|---|---|---|
74ALVT16373DGG | Production | 2.3 - 3.6 | TTL | -32/+64 | 1.8 | 16 | medium | -40~85 | 82 | 1.8 | 35 | TSSOP48 |