![[pics:title]](/style/pc/img/proimg.jpg)
3.3 V 16-bit transparent D-type latch with 30 Ohm termination resistors; 3-state
The 74LVT162373 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device is a 16-bit transparent D-type latch with non-inverting 3-state bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When latch enable (LE) input is HIGH, the Q outputs follow the date (D) inputs. When latch enable is taken LOW, the Q outputs are latched at the levels of the D inputs one setup time prior to the HIGH-to-LOW transition.
The 74LVT162373 is designed with 30 Ω series resistance in both the HIGH-state and LOW-state of the output. This design reduces the noise in applications such as memory address drivers, clock drivers and bus receivers and transmitters.
16-bit transparent latch
3-state buffers
Output capability: +12 mA/–12 mA
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
Live insertion/extraction permitted
Outputs include series resistance of 30 Ω making external termination resistors unnecessary
Power-up reset
Power-up 3-state
No bus current loading when output is tied to 5 V bus
Latch-up protection:
JESD78B Class II exceeds 500 mA
ESD protection:
HBM: JESD22-A114F exceeds 2000 V
MM: JESD22-A115-A exceeds 200 V
| Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVT162373DGG | Production | 2.7 - 3.6 | TTL | ± 12 | 2.5 | 16 | medium | -40~85 | 82 | 1.8 | 35 | TSSOP48 |