Phase-locked loop with VCO
The 74HC4046A-Q100 is a high-speed Si-gate CMOS device. It is specified in compliance with JEDEC standard no 7A.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Low power consumption
VCO-Inhibit control for ON/OFF keying and for low standby power consumption
Center frequency up to 17 MHz (typical) at VCC = 4.5 V
Choice of three phase comparators:
PC1: EXCLUSIVE-OR
PC2: Edge-triggered J-K flip-flop
PC3: Edge-triggered RS flip-flop
Excellent Voltage Controlled Oscillator (VCO) linearity
Low frequency drift with supply voltage and temperature variations
Operating power supply voltage range:
VCO section 3.0 V to 6.0 V
Digital section 2.0 V to 6.0 V
Zero voltage offset due to operational amplifier buffering
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
FM modulation and demodulation
Frequency synthesis and multiplication
Frequency discrimination
Tone decoding
Data synchronization and conditioning
Voltage-to-frequency conversion
Motor-speed control
Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
---|---|---|---|---|---|---|---|---|---|---|---|
74HC4046APW-Q100 | Production | 3.0 - 6.0 | CMOS | ± 5.2 | 18 | low | -40~125 | 109 | 1.0 | 36 | TSSOP16 |